State

pyrung.core.state

Immutable system state for PLC simulation.

The core data structure for the Redux-style architecture. All state transitions produce new SystemState instances.

SystemState

Bases: PRecord

Immutable snapshot of PLC state at a point in time.

Attributes:

Name	Type	Description
scan_id		Monotonically increasing scan counter.
timestamp		Simulation clock in seconds.
tags		Immutable mapping of tag names to values (bool, int, float, str).
memory		Immutable mapping for internal state (timers, counters, etc).

with_tags

with_tags(
    updates: dict[str, bool | int | float | str],
) -> SystemState

Return new state with updated tags. Original unchanged.

with_memory

with_memory(updates: dict[str, Any]) -> SystemState

Return new state with updated memory. Original unchanged.

next_scan

next_scan(dt: float) -> SystemState

Return new state for next scan cycle.

Parameters:

Name	Type	Description	Default
dt	float	Time delta in seconds to add to timestamp.	required